Play allFPGAs and digital design
48 videos • 23 hr 11 min
Part of Hardware. Ordered by how many people recommended each video and for how long; 1 is a classic.
1 2 3 4 FPGA based mobile phone: Creating a truly open and trustable mobile communications device
linux.conf.au
Recommended by 2 •
5 Rishiyur S. Nikhil - Enigmatic Haskell, Haskellish Enigma
Boston Haskell
Recommended by 2 •
Hidden gem6 How to install Xilinx ISE Design Suite 14.7 on Ubuntu 18.04 (with drivers)
Apurva Nandan
Recommended by 2 •
7 8 Hackster Connects: A Conversation About FPGAs with Microchip's Shakeel Peera (feat. Adam Taylor)
Hackster.io, an Avnet community
Recommended by 2 •
Hidden gem9 10 11 12 13 FPL'20: High Bandwidth Memory on FPGAs: A Data Analytics Perspective
Systems Group at ETH Zürich
Recommended by 1 •
14 15 16 Fixed point basics in Verilog for Beginners! Continuation of polynomial example.
FPGAs for Beginners
Recommended by 1 •
17 18 19 20 21 [SPCL_Bcast] Cloud-Scale Inference on FPGAs at Microsoft Bing
Scalable Parallel Computing Lab, SPCL @ ETH Zurich
Recommended by 1 •
22 Architecture All Access: Modern FPGA Architecture | Intel Technology
Intel Technology
Recommended by 1 •
23 24 Hardwear.io 2017: Reverse Engineering Of Programmable Logic Bitstreams by Andrew Zonenberg
hardwear.io
Recommended by 1 •
25 26 27 28 29 Microcontroller in FPGA? This is how to do it ... | Step by Step Tutorial | Adam Taylor
Robert Feranec
Recommended by 1 •
30 31 32 33 34 Build your own demo machine using FPGA by Zerkman for Shadow Party 2021
Shadow Party
Recommended by 1 •
35 Laser Fault Injection. because FPGAs deserve to feel pain.
Kyle's maybe electrical emporium
Recommended by 1 •
36 37 38 39 Installing Windows 3.1 on 486 CPU running on Intel Altera Cyclone V FPGA [REALTIME]
usrbinbash
Recommended by 1 •
40 41 SNES CD is Coming Back? Progress Made on Nintendo’s Lost Console
Video Game Esoterica
Recommended by 1 •
42 43 44 45 46 47 Testing input voltage on Xilinx zynq-7020 Z-turn by XADC
MYIR Electronics Limited
Recommended by 2 •
Hidden gem48 How to write SPI Interface code in Verilog HDL for a 12-bit ADC (using the DE0-Nano)
Visual Electric
Recommended by 1 •



















![[SPCL_Bcast] Cloud-Scale Inference on FPGAs at Microsoft Bing](https://i.ytimg.com/vi/It2TYTlvU2c/maxresdefault.jpg)

















![Installing Windows 3.1 on 486 CPU running on Intel Altera Cyclone V FPGA [REALTIME]](https://i.ytimg.com/vi/7xJSmtKa6LQ/maxresdefault.jpg)








