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Intermediate. Assumes working knowledge.
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HardwareSystems programmingMemory managementCPUs and computer architectureElectronics
Branch Education explains how DRAM works, from its connection to the CPU down to the nanoscale capacitors storing individual bits.
Check out Crucial NVMe SSDs Here: crucial.com/ Have you ever wondered why it takes time for computers to load programs or video games? Also, ever wonder why your computer uses both DRAM as well as SSDs when they both are used to store data? Well, most of that time is spent moving data from a hard drive or SSD into DRAM or Dynamic Random Access Memory, which is the working memory inside your computer. In this video, we're going to take a very deep dive into DRAM. We'll see how it connects to other parts of your computer, and then we'll explore how DRAM can store gigabytes of data in nanoscopic capacitors. After that, we'll cover the three main operations of DRAM: Reading, Writing, and Refreshing. And finally, we'll dive deep into some more complex aspects of DRAM that make it so amazingly fast such as folded DRAM architecture. We'll also learn what burst buffers are, and why there are so many banks of DRAM memory cells. Do you want to support in-depth engineering and technology education? Support us at: patreon.com/brancheducation Website: branch.education On Facebook: facebook.com/BranchEducation/ On Twitter: twitter.com/TeddyTablante On Insta: instagram.com/brancheducation/ Thanks to Nathan, Peter, and Jacob for helping research and review this video! They're doctoral students at the Florida Institute for Cybersecurity Research, and you can learn more about their program here: fics.institute.ufl.edu/ Table of Contents: - Intro to Computer Memory - DRAM vs SSD - Loading a Video Game - Parts of this Video - Notes - Intro to DRAM, DIMMs & Memory Channels - Crucial Sponsorship - Inside a DRAM Memory Cell - An Small Array of Memory Cells - Reading from DRAM - Writing to DRAM - Refreshing DRAM - Why DRAM Speed is Critical - Complicated DRAM Topics: Row Hits - DRAM Timing Parameters - Why 32 DRAM Banks? - DRAM Burst Buffers - Subarrays - Inside DRAM Sense Amplifiers - Outro to DRAM Key Branches from this video are: How do Solid State Drives Work? Erratum: At 10m 08s : Cicruit || Should be Circuit At 21m 54s : 32 Bank Groups || Should be 32 Banks. Script, Modeling, Animation: Teddy Tablante Twitter: @teddytablante Animation: Mike Radjabov Modeling: Prakash Kakadiya Voice Over: Phil Lee Sound Design: www.drilu.mx Music Editing: Luis Zuleta Sound Effects: Paulo de los Cobos Supervising Sound Editor and Mixer: Luis Huesca Animation built using Blender 3.1.2 blender.org/ Post with Adobe Premiere Pro References: DDR5 SDRAM. JEDEC Standard. JESD79-5 July 2020 Dr. Cutress, Ian. "Insights into DDR5 Sub-Timings and Latencies". Oct 6th, 2020. Dr. El-Maleh, Aiman. "Functions and Functional Blocks: Digital Logic Design" College of Computer Sciences and Engineering. King Fahd University of Petroleum and Minerals. Hajimiri, Ali. Et aWhat people say. Recommended as an excellent, highly visual explanation of how computer memory and DRAM timings work.
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