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#microprocessors#moore'slaw#darksilicon

Sophie Wilson - The Future of Microprocessors

Erlang Solutions

18K subscribers • 48 videos on Hallway

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  • Recommended by 2 people: 2 on Hacker News.
  • Presented by Sophie Wilson, designer of the ARM instruction set

Intermediate. Assumes working knowledge.

57K views9 years ago2 recommendations

HardwareSystems programmingCPUs and computer architecturePerformance and optimization

Sophie Wilson discusses the physical and economic limits of microprocessor scaling, dark silicon, and the future of computer architecture.

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Why it's here

2 people recommend this

What people say. Engineers highly recommend this talk for its deep insights into the physical and economic limits of silicon scaling and Moore's Law.

dkarapetyanon Hacker News • Recommends

On “This AI Boom Will Also Bust”

Moore's law has been dead for a while now. Most of the chip in your phone is powered off because otherwise it would burn up. Highly recommend watching this video: link to this video

genson Hacker News • Recommends

On “The Race to 10/7nm”

It is hard (read expensive) to go under 14nm. Sophie Wilson talks about it much better then i could. link to this video

programming-talkscurated list on GitHubMentions

Under “Hardware”

The Future of Microprocessors 00:46:35 by **Sophie Wilson** (2016)

qzncon Hacker News • Mentions

On “What happened to clockless computer chips?”

> when Moore's Law hits physical limits? It already did. Sophie Wilson said 0 its 28nm for ever. Scaling further makes no economic sense (unless you really need the space, e.g. in Smartphones). 0 link to this video

zengidon Hacker News • Mentions

On “C Is Not a Low-Level Language”

I agree that this article hits pretty hard against a lot of assumptions about how our machines are working. I also feel like the author is trying to say something about how imperative scalar (meaning 'operates on one datum at a time') languages are causing more trouble than they're worth. Sophie Wilson said something similar in her talk about the future of microprocessors 1. This implies that declarative and functional semantics would be more amenable to parallelization, as the author mentions in the article, as well as allowing the compiler more freedom to deduce a suitable 'reordering' of operations that would better fit the memory access heuristics the machine is using. 1 link to this video