Skip to content
Hallway
0:00 / 0:00

#quartus#altera#fpga

Creating a Waveform Simulation for Intel (Altera) FPGAs (Quartus version 13 and newer) (Sec 4-4B )

BillKleitz

14K subscribers • 1 video on Hallway

YouTube
  • Recommended by 2 people: 2 in engineering communities.
  • Presented by William Kleitz, Professor
  • May be out of date. The tools, versions or practices it shows have likely moved on.

Beginner. No background in the topic needed.

345K views13 years ago2 recommendations

HardwareElectronicsTesting

William Kleitz shows how to create a vector waveform file to simulate logic designs in Intel Quartus II.

Professor Kleitz shows you how to create a vector waveform file so that you can simulate your Quartus logic design. (This is the new procedure used in Quartus II versions 13 and newer) This material follows Section 4-4 of Professor Kleitz's textbook "Digital Electronics A Practical Approach with VHDL" 9th edition amazon.com/William-Kleitz/e/B001IQWPDU/ Professor Kleitz's YouTube Channel : youtube.com/channel/UCFC56lANq_FESHes9j0NKnw Also, You can get free downloads of the MultiSIM data files, Quartus solution datafiles and multiple choice quiz questions from Pearson (the publisher of my textbook) The url for the Resources Website is: pearsonhighered.com/careersresources/ Select "Browse by Discipline" and you'll find it under "electronics". FYI Check out my YouTube tutorials for the entire textbook at youtube.com/user/billkleitz

Why it's here

2 people recommend this

What people say. Recommended as a helpful tutorial for manually setting up and editing external signals in the Quartus GUI simulator.

u/ASroma-777in r/FPGA • Recommends

On “How to make a waveform simulation in Quartus II from the testbench module”

I usually follow this tutorial (youtube.com/watch?v=a8JAkKhxlQI) to make a waveform simulation in Quartus II. But it's still very handmade, I have to designate x with T = 1us, y with T = 2us, set end Time, and grid size. When it comes to auto-generating input waves by testbench file, I haven't found any tutỏials yet.
3View on Reddit

u/Top_Carpet966in r/FPGA • Recommends

On “Quartus prime lite VMS”

On simulation you need to set up all external signals by yourself. Make script or by editing those signals in simulator gui. It should be similar to how you sed reset signal, but instead of sngular signal switch should be clock macro somwhere around. here is tutorial for editing it in gui [video
2View on Reddit