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#microblaze#vivado#vitis

Microcontroller on FPGA (Microblaze, UART, GPIO) - Phil's Lab #108

Phil’s Lab

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Intermediate. Assumes working knowledge.

67K views3 years ago2 recommendations

HardwareSystems programmingFPGAs and digital designEmbedded systemsCPUs and computer architecture

Phil explains how to implement an AMD/Xilinx Microblaze soft-core microcontroller with UART and GPIO peripherals on an FPGA using Vivado and Vitis.

How to implement a soft-core microcontroller (AMD/Xilinx Microblaze) and peripherals (UART, GPIO) on an FPGA. PCBs by PCBWay pcbway.com From project creation, system generation in Vivado, Vitis set-up, to live demos. Featuring a custom AMD/Xilinx Spartan 7-based audio processing PCB. (AD: This video includes a paid promotion for PCBWay and Altium). [SUPPORT] Hardware design courses: phils-lab-shop.fedevel.education Course content: phils-lab.net/courses Free trial of Altium Designer: altium.com/yt/philslab (AD) Patreon: patreon.com/phils94 [GIT] github.com/pms67 [SOCIAL] Instagram: instagram.com/philslabyt [LINKS] Microblaze: xilinx.com/products/design-tools/microblaze.html Vivado: xilinx.com/products/design-tools/vivado.html Vitis: xilinx.com/products/design-tools/vitis/vitis-platform.html [TIMESTAMPS] Introduction Altium Designer Free Trial (Ad) PCBWay (Ad) Hardware Design Course Microblaze Basics Hardware Block Diagram Vivado Project Set-Up Constraints Microblaze Block Design Clocking Wizard IP UART IP GPIO IP Reset Signal Bitstream Generation Exporting Hardware (XSA) Vitis IDE Vitis Project Set-Up UART Hello World Test GPIO LED Test Outro

Why it's here

2 people recommend this

What people say. Recommended as a great tutorial for understanding soft-core CPUs and IP gluing on FPGAs.

Moments people linked to

u/d1722825in r/embedded • Recommends

On “Are Microprocessors With An Open Memory Map Still Made?”

…AM (or swapped out to disk). --- If you are interested in these I can highly recommend FPGAs. You can basically pick the things you want (let's have two CPU cores, add an UART, two GPIOs, a small internal RAM) and create a custom system with as many hacks as you desire. A small teaser (Microblaze is a CPU core from one of the big FPGA vendor): link to this video If you really want, you could implement (download) a 68k CPU in the FPGA and expose the whole memory bus on the FPGA's pins. There are some cheap (at least in the FPGA world) developer boards from Digilent / Terasic.…
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u/brh_hackermanin r/FPGA • Recommends

On “[Help, Tips and Ressources] From Noob to Booting linux : A RISC-V adventure on FPGA ! ”

Note : found a couple of interesting tutorials ! May be outdated on some points but interessting to get a basic grasp on "IP gluing" and move on. For french speaker : a tutorial from a professor @ the University of Nantes For basic use of Vivado for the Zybo Z7-20 : -> [video -> [video Another one, in english, explaining how to flash the Microblaze Core on fpga and use Basic IO & Uart. -> [video ( Doing this on the zybo is not as easy though, i will try to get it working and maybe make a tutorial of my own)